HD6432351 datasheet(343/1025 Pages) RENESAS

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HD6432351 데이터시트(PDF) 343 Page - Renesas Technology Corp

부품명	HD6432351

상세설명	16-Bit Single-Chip Microcomputer

PDF	1025 Pages

Scroll/Zoom	100%

제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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343 / 1025 page

Section 8 Data Transfer Controller (DTC)

Rev. 3.00 Sep 15, 2006 page 309 of 988

REJ09B0330-0300

8.3.5

Normal Mode

In normal mode, one operation transfers one byte or one word of data.

From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a

CPU interrupt can be requested.

Table 8.5 lists the register information in normal mode and figure 8.6 shows memory mapping in

normal mode.

Table 8.5

Name

Abbreviation

Function

DTC source address register

SAR

Designates source address

DTC destination address register

DAR

Designates destination address

DTC transfer count register A

CRA

Designates transfer count

DTC transfer count register B

CRB

Not used

Transfer

SAR

DAR

Figure 8.6 Memory Mapping in Normal Mode

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