HD64F2149YV datasheet(420/1075 Pages) RENESAS

부품명	HD64F2149YV

상세설명	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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420 / 1075 page

Section 13 Timer Connection

Rev. 3.00 Jan 18, 2006 page 392 of 1044

REJ09B0280-0300

Bit 7—VSYNCI Edge (VEDG): Detects a rising edge on the VSYNCI pin.

Bit 7

VEDG

Description

[Clearing condition]

When 0 is written in VEDG after reading VEDG = 1

(Initial value)

[Setting condition]

When a rising edge is detected on the VSYNCI pin

Bit 6—HSYNCI Edge (HEDG): Detects a rising edge on the HSYNCI pin.

Bit 6

HEDG

Description

[Clearing condition]

When 0 is written in HEDG after reading HEDG = 1

(Initial value)

[Setting condition]

When a rising edge is detected on the HSYNCI pin

Bit 5—CSYNCI Edge (CEDG): Detects a rising edge on the CSYNCI pin.

Bit 5

CEDG

Description

[Clearing condition]

When 0 is written in CEDG after reading CEDG = 1

(Initial value)

[Setting condition]

When a rising edge is detected on the CSYNCI pin

Bit 4—HFBACKI Edge (HFEDG): Detects a rising edge on the HFBACKI pin.

Bit 4

HFEDG

Description

[Clearing condition]

When 0 is written in HFEDG after reading HFEDG = 1

(Initial value)

[Setting condition]

When a rising edge is detected on the HFBACKI pin

HD64F2149YV 데이터시트(PDF) 420 Page - Renesas Technology Corp