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HD64F2149YV 데이터시트(PDF) 418 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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HD64F2149YV 데이터시트(HTML) 418 Page - Renesas Technology Corp

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Section 13 Timer Connection
Rev. 3.00 Jan 18, 2006 page 390 of 1044
REJ09B0280-0300
Bits 5 and 4—Horizontal Synchronization Output Mode Select 1 and 0 (HOMOD1,
HOMOD0): These bits select the signal source and generation method for the IHO signal.
Bit 6
Bit 5
Bit 4
ISGENE
VOMOD1
VOMOD0
Description
0
0
0
The IHI signal (without 2fH modification)
is selected
(Initial value)
1
The IHI signal (with 2fH modification) is selected
1
0
The CL1 signal is selected
1
1
0
0
The IHG signal is selected
1
10
1
Bits 3 and 2—Vertical Synchronization Output Mode Select 1 and 0 (VOMOD1, VOMOD0):
These bits select the signal source and generation method for the IVO signal.
Bit 6
Bit 3
Bit 2
ISGENE
VOMOD1
VOMOD0
Description
0
0
0
The IVI signal (without fall modification or IHI
synchronization) is selected
(Initial value)
1
The IVI signal (without fall modification, with IHI
synchronization) is selected
1
0
The IVI signal (with fall modification, without IHI
synchronization) is selected
1
The IVI signal (with fall modification and IHI
synchronization) is selected
1
0
0
The IVG signal is selected
1
10
1



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