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M16C/1N 데이터시트(PDF) 47 Page - Renesas Technology Corp

부품명 M16C/1N
상세설명  RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES
PDF  238 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M16C/1N 데이터시트(HTML) 47 Page - Renesas Technology Corp

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Rev.1.00
Oct 20, 2004
page 35 of 222
M16C/1N Group
6. Clock Generation Circuit
REJ09B0007-0100Z
CM07="0" (Note 1)
CM06="1"
CM04="0"
CM04="1"
(Notes 1, 3)
CM04="0"
BCLK: f(XIN)/8
CM07="0" CM06="1"
CM22="0"
CM06="1"
BCLK: f(RING)/8
BCLK: f(RING)/8
CM07="0"
CM06="1"
CM05="1"
CM22="1"
CM07="0"
CM06="1"
CM05="0"
CM22="1"
BCLK: f(RING)/2
BCLK: f(RING)
CM07="0"
CM06="0"
CM05="1"
CM22="1"
CM16="0"
CM17="0"
CM22="1"
CM22="0"
(Note 1)
BCLK: f(RING)/16
BCLK: f(RING)/4
Transition of normal operation mode
Main clock is oscillating
Sub clock is stopped
Medium-speed mode (divided-by-8 mode)
Low-speed mode
High-speed mode
Main clock is oscillating
Sub clock is stopped
Main clock is stopped
Sub clock is oscillating
Main clock is oscillating
Sub clock is oscillating
Low power dissipation mode
BCLK : f(XIN)/2
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
Medium-speed mode
(divided-by-2 mode)
BCLK : f(XIN)/16
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
Medium-speed mode
(divided-by-16 mode)
BCLK : f(XIN)/4
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
Medium-speed mode
(divided-by-4 mode)
BCLK : f(XIN)
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
BCLK : f(XIN)/8
Medium-speed mode
(divided-by-8 mode)
CM07 = "0"
CM06 = "1"
High-speed mode
BCLK : f(XIN)/2
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
Medium-speed mod
(divided-by-2 mode)
BCLK : f(XIN)/16
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
Medium-speed mode
(divided-by-16 mode)
BCLK : f(XIN)/4
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
Medium-speed mode
(divided-by-4 mode)
BCLK : f(XIN)
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
BCLK : f(XCIN)
CM07 = "1"
CM06 = "1"
BCLK : f(XCIN)
CM07 = "1"
CM06 = "1"
Main clock is oscillating
Sub clock is oscillating
CM07 = "0"
(Notes 1, 3)
CM07 = "1"
CM06 = "1"
(Note 2, 5)
CM07 = "0" (Note 1)
CM06 = "0" (Note 3)
CM04 = "1"
CM05 = "0"
CM05 = "1"
CM04 = "0"
CM04 = "1"
CM06 = "0"
(Notes 1, 3)
Main clock is oscillating
Sub clock is stopped
On-chip oscillator mode (divided-by-8 mode)
Main clock is stopped
Sub clock is stopped
On-chip oscillator mode
CM05 = "0"
CM05 = "1"
8-division mode
1-division mode (Note 3)
2-division mode (Note 3)
16-division mode (Note 3)
4-division mode (Note 3)
CM07="0"
CM06="0"
CM05="1"
CM22="1"
CM16="1"
CM17="0"
CM07="0"
CM06="0"
CM05="1"
CM22="1"
CM16="1"
CM17="1"
CM07="0"
CM06="0"
CM05="1"
CM22="1"
CM16="0"
CM17="1"
Note 1: Switch clock after oscillation of main clock is sufficiently stable.
Note 2: Switch clock after oscillation of sub clock is sufficiently stable.
Note 3: Change CM17 and CM16 before changing CM06.
Note 4: Transit in accordance with arrow.
Note 5: Before switching BCLK to other from the main clock, divide the main clock by 8 for
safety purposes to switch BCLK to the main clock again.
Figure 6.9 State transition in normal operation mode



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