| 전자부품 데이터시트 검색엔진 |
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SH7052 데이터시트(PDF) 412 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 412 Page - Renesas Technology Corp |
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412 / 919 page ![]() 386 Sample Setup Procedure for Channel 10 Missing-Teeth Detection: An example of the setup procedure for missing-teeth detection is shown in figure 10.63. 1. Set port B control register H (PBCRH) or port L control register L (PLCRL), corresponding to the port for input of the external signal (missing-teeth signal), to ATU edge input (TI10). 2. Set 1st-stage counter clock ø' in prescaler register 4 (PSCR4). Set the external input (TI10) cycle multiplication factor with the PIM bits in timer I/O control register 10 (TIOR10), and enable reload register 10C (RLD10C) updating with the RLDEN bit. Select the external input edge type with the CKEG bits in timer control register 10 (TCR10). 3. Set general register 10G (GR10G) to the compare-match function with bit IO10G in TIOR10. Also, an interrupt request can be sent to the CPU upon compare-match by making a setting in interrupt enable register 10 (TIER10). 4. Set the timing for compare-match generation in GR10G according to the multiplication factor and number of missing-teeths in the missing-teeth interval set in step 1. 5. Set the corresponding bit to 1 in timer start register 1 (TSTR1) to start the channel 10 count. A compare-match occurs when the values in free-running counter 10G (TCNT10G) and GR10G match. Note: The TCNT10G counter clock is generated according to the external input edge interval and multiplication factor selected in step 1, and the counter is cleared to H'0000 by an external input edge. Set port-ATU-II connection 1 Select counter clock 2 Set missing-teeth timing 4 Start counter 5 Set compare-match 3 Interrupt requests to CPU Start Figure 10.63 Sample Setup Procedure for Missing-Teeth Detection |
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