SH7052 datasheet(97/919 Pages) RENESAS

97 / 919 page

5.5.3

Illegal Slot Instructions

An instruction placed immediately after a delayed branch instruction is said to be placed in a delay

slot. When the instruction placed in the delay slot is undefined code, illegal slot exception

processing starts up when that undefined code is decoded. Illegal slot exception processing also

starts up when an instruction that rewrites the program counter (PC) is placed in a delay slot. The

processing starts when the instruction is decoded. The CPU handles an illegal slot instruction as

follows:

1. The status register (SR) is saved to the stack.

2. The program counter (PC) is saved to the stack. The PC value saved is the jump address of the

delayed branch instruction immediately before the undefined code or the instruction that

rewrites the PC.

3. The exception service routine start address is fetched from the exception processing vector

table that corresponds to the exception that occurred. That address is jumped to and the

program starts executing. The jump that occurs is not a delayed branch.

5.5.4

General Illegal Instructions

When undefined code placed anywhere other than immediately after a delayed branch instruction

(i.e., in a delay slot) is decoded, general illegal instruction exception processing starts up. The

CPU handles general illegal instructions in the same way as illegal slot instructions. Unlike

processing of illegal slot instructions, however, the program counter value stored is the start

address of the undefined code.

SH7052 데이터시트(PDF) 97 Page - Renesas Technology Corp