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SH7052 데이터시트(PDF) 219 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 219 Page - Renesas Technology Corp |
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219 / 919 page ![]() 193 Block Diagram of Channel 0: Figure 10.2 shows a block diagram of ATU-II channel 0. A/D converter trigger TRGOD (OCR10B compare-match signal) Control logic I/O control OSBR (ch1, ch2) Internal data bus and address bus STR0 TI0A TI0B TI0C TI0D Prescaler 1 Overflow interrupt signal Interval interrupt TIOR0 TIER0 ITVRR1 ITVRR2A ITVRR2B TSR0 ICR0AL ICR0BL ICR0CL ICR0DL TCNT0L ICR0AH ICR0BH ICR0CH ICR0DH TCNT0H Figure 10.2 Block Diagram of Channel 0 |
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