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SH7052 데이터시트(PDF) 300 Page - Renesas Technology Corp

부품명 SH7052
상세설명  SuperHTM RISC engine
PDF  919 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 데이터시트(HTML) 300 Page - Renesas Technology Corp

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274
Timer Interrupt Enable Registers 6 and 7 (TIER6, TIER7)
TIER6 and TIER7 control enabling/disabling of channel 6 and 7 cycle register compare interrupt
requests.
Bit:
15
14
13
12
11
10
9
8
——
——
———
—
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
——
——
CMExD
CMExC
CMExB
CMExA
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R/W
R/W
R/W
R/W
x = 6 or 7
• Bits 15 to 4—Reserved: These bits always read 0. The write value should always be 0.
• Bit 3—Cycle Register Compare-Match Interrupt Enable 6D/7D (CME6D/CME7D): Enables or
disables interrupt requests by CMFxD in TSR6 or TSR7 when CMFxD is set to 1. Setting the
DMAC while interrupt requests are enabled allows the DMAC to be activated by an interrupt
request.
Bit 3: CMExD
Description
0
CMIxD interrupt requested by CMFxD is disabled
(Initial value)
1
CMIxD interrupt requested by CMFxD is enabled
x = 6 or 7
• Bit 2—Cycle Register Compare-Match Interrupt Enable 6C/7C (CME6C/CME7C): Enables or
disables interrupt requests by CMFxC in TSR6 or TSR7 when CMFxC is set to 1. Setting the
DMAC while interrupt requests are enabled allows the DMAC to be activated by an interrupt
request.
Bit 2: CMExC
Description
0
CMIxC interrupt requested by CMFxC is disabled
(Initial value)
1
CMIxC interrupt requested by CMFxC is enabled
x = 6 or 7



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