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7721 데이터시트(PDF) 52 Page - Renesas Technology Corp

부품명 7721
상세설명  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  577 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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CONNECTION WITH EXTERNAL DEVICES
7721 Group User’s Manual
3–5
3.1 Signals required for accessing external devices
3.1.2 Operation of bus interface unit (BIU)
Figures 3.1.2 and 3.1.3 show the examples of operating waveforms of the signals input from or output to
the external when accessing external devices. The following explains these waveforms, being compared
with the basic operating waveform. (Refer to section “2.2.3 Operation of bus interface unit (BIU).”)
(1)
When fetching instructions into instruction queue buffer
Œ When the instruction which is next fetched is located at an even address
When the external data bus width is 16 bits, the BIU fetches 2 bytes of the instruction at a time
with waveform (a). When the external data bus width is 8 bits, the BIU fetches only 1 byte of the
instruction with the first half of waveform (e).
 When the instruction which is next fetched is located at an odd address
When the external data bus width is 16 bits, the BIU fetches only 1 byte of the instruction with
waveform (d). When the external data bus width is 8 bits, the BIU fetches only 1 byte of the
instruction with the first half of waveform (f).
When a branch to an odd address is caused by a branch instruction etc. with the 16-bit external data
bus width, the BIU first fetches 1 byte of the instruction with waveform (d), and after that, fetches
instructions in a unit of 2 bytes with waveform (a).
(2)
When reading or writing data from and to memories or I/O devices
Œ When accessing 16-bit data which begins at an even address, waveform (a) or (e) is applied.
 When accessing 16-bit data which begins at an odd address, waveform (b) or (f) is applied.
Ž When accessing 8-bit data at an even address, waveform (c) or the first half of (e) is applied.
 When accessing 8-bit data at an odd address, waveform (d) or the first half of (f) is applied.
For instructions that are affected by the data length flag (m) and the index register length flag (x),
operation Œ or  is applied when flag m or x = “0”; operation Ž or  is applied when flag m or x
= “1.”
The setup of flags m and x and the selection of the external data bus width do not affect each other.



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