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7721 Group User’s Manual

7–3

INTERRUPTS

When an interrupt request is accepted, the following registers’ contents just before acceptance of an interrupt

request are automatically pushed onto the stack area

→→ in that order.

Program bank register (PG)

Program counter (PCL, PCH)

Processor status register (PSL, PSH)

Figure 7.1.2 shows the state of the stack area just before entering the interrupt routine.

Execute the RTI instruction at the end of this interrupt routine to return to the routine that the microcomputer

was executing before the interrupt request was accepted. By executing the RTI instruction, the register

contents pushed onto the stack area are pulled

→→ in that order. Then, the suspended processing is

resumed from where it left off.

7.1 Overview

[S] is an initial address that the stack pointer (S) indicates

when an interrupt request is accepted. The S’s contents

become “[S] – 5” after all of the above registers are pushed.

Address

[S] – 4

[S] – 3

[S] – 2

[S] – 1

[S]V

Processor status register’s low-order byte (PSL)

Stack area

[S] – 5

Processor status register’s high-order byte (PSH)

Program counter’s low-order byte (PCL)

Program counter’s high-order byte (PCH)

Program bank register (PG)

Fig. 7.1.2 State of stack area just before entering interrupt routine

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