| 전자부품 데이터시트 검색엔진 |
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7721 데이터시트(PDF) 134 Page - Renesas Technology Corp |
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7721 데이터시트(HTML) 134 Page - Renesas Technology Corp |
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134 / 577 page ![]() TIMER A 7721 Group User’s Manual 8–15 8.3 Timer mode 8.3.4 Selectable functions The following describes the selectable gate function for Timers A2 to A4 and pulse output function. (1) Gate function The gate function is selected by setting the gate function select bits (bits 4 and 3 at addresses 5816 to 5A16 ) to “102” or “112.” The gate function makes it possible to start or stop counting depending on the TAjIN pin’s input signal. Table 8.3.3 lists the count valid levels. Figure 8.3.5 shows an example of operation with the gate function selected. When selecting the gate function, set the port P5 direction registers’ bits which correspond to the TAjIN pin for the input mode. Additionally, make sure that the TAjIN pin’s input signal has a pulse width equal to or more than two cycles of the count source. Table 8.3.3 Count valid levels Gate function select bits b4 1 1 b3 0 1 Count valid level (Duration while counter counts) While TAjIN pin’s input signal is at “L” level While TAjIN pin’s input signal is at “H” level Note: The counter does not count while the TAjIN pin’s input signal is not at the count valid level. Fig. 8.3.5 Example of operation selecting gate function FFFF16 n 000016 Time Starts counting. n = Reload register’s contents Stops counting. Set to “1” by software. Count start bit TAjIN pin’s input signal Count valid level Timer Aj interrupt request bit Cleared to “0” when interrupt request is accepted or cleared by software. The counter counts when the count start bit = “1” and the TAjIN pin’s input signal is at the count valid level. The counter stops counting while the TAjIN pin’s input signal is not at the count valid level, and the counter value is retained. Invalid level |
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