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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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7721 데이터시트(PDF) 206 Page - Renesas Technology Corp |
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7721 데이터시트(HTML) 206 Page - Renesas Technology Corp |
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206 / 577 page  SERIAL I/O 7721 Group User’s Manual 11–3 11.2 Block description Figure 11.2.1 shows the block diagram of Serial I/O. Registers relevant to Serial I/O are described below. 11.2 Block description RxDi Data bus (odd) Data bus (even) 00 0 0 0 0 0 UARTi receive register UARTi receive buffer register UARTi transmit buffer register Receive control circuit Transmit control circuit 1 / (n+1) 1/16 1/16 1/2 BRGi Clock synchronous (internal clock selected) UART Clock synchronous UART Clock synchronous (internal clock selected) Clock synchronous (external clock selected) Data bus (odd) Data bus (even) TxDi Transfer clock Transfer clock CLKi BRG count source select bits CTSi / RTSi UARTi transmit register n: Values set in UARTi baud rate register (BRGi) Clock synchronous D8 D7 D6 D5 D4 D3 D2 D1 D0 f2 f16 f64 f512 D8 D7 D6 D5 D4 D3 D2 D1 D0 Fig. 11.2.1 Block diagram of Serial I/O |
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