7733 datasheet(59/940 Pages) RENESAS

59 / 940 page

CENTRAL PROCESSING UNIT (CPU)

7733 Group User’s Manual

2–20

Fig. 2.4.2 M37733MHBXXXFP’s memory map (1)

01FFFF16

FF000016

SFR area

Internal RAM area

3968 bytes

00000016

00007F16

00008016

000FFF16

FFFFFF16

Bank 016

Bank 116

Bank FF16

Internal ROM area

60 Kbytes

Internal ROM area

64 Kbytes

00100016

00FFFF16

01000016

Bank 216

00200016

00000016

00007F16

00008016

000FFF16

(4 Kbytes)

00FFFF16

01000016

01FFFF16

FFFFFF16

00000016

00007F16

A-D/UART2 trans./rece.

UART1 reception

UART0 reception

Timer B2

Timer B1

Timer B0

Timer A4

Timer A3

Timer A2

Timer A1

Timer A0

INT2/Key input

INT1

INT0

Watchdog timer

DBC

BRK instruction

Zero divide

RESET

00FFD616

00FFFE16

Interrupt vector

table

SFR area

Internal RAM area

3968 bytes

Internal ROM area

56 Kbytes

Internal ROM area

64K bytes

Peripheral device

control registers

(SFR)

• Memory allocation selection bits (b2, b1, b0)=(0, 0, 0)

• ROM size: 124 Kbytes

• RAM size: 3.9 Kbytes

• Memory allocation selection bits (b2, b1, b0)=(0, 0, 1)

• ROM size: 120 Kbytes

• RAM size: 3.9 Kbytes

UART1 transmission

UART0 transmission

: Unused area in the single-chip

mode

External memory area in the

memory expansion or

microprocessor mode

Notes 1: Access to internal ROM area is disabled in the microprocessor mode.

(Refer to section “2.5 Processor modes.”)

2: Banks 1016 to FF16 cannot be accessed in the 7735 Group and in external bus mode B of

the 7736 Group. (Refer to section “Appendix 1 in part 2.”)

Refer to

Appendix 2.

02FFFF16

02000016

2.4 Memory allocation

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