7733 datasheet(71/940 Pages) RENESAS

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7733 Group User’s Manual

3–2

PROGRAMMABLE I/O PORTS

Functions of all ports in the single-chip mode and that of ports P43 to P47 and P5 to P8 in the memory

expansion and the microprocessor modes are described below. For more information about ports P0 to P4,

whose functions depend on the processor mode, refer to section “2.5 Processor modes” and chapter “12.

CONNECTING EXTERNAL DEVICES.”

3.1 Programmable I/O ports

The 7733 Group has 68 programmable I/O ports (P0 to P8).

Each of ports P0 to P8 has a port direction register and a port register in the SFR area. Each input-only

port has a port register in the SFR area. Figure 3.1.1 shows the memory map of port direction registers and

port registers.

Note that ports P42 and P5 to P8 also function as I/O pins for internal peripheral devices. For details, refer

to section “3.4 Internal peripheral devices’ I/O functions” and the corresponding functional description.

3.1 Programmable I/O ports

Fig. 3.1.1 Memory map of port direction registers and port registers

Port P4 register

Port P5 register

Port P4 direction register

Port P5 direction register

Port P6 register

Port P7 register

Port P6 direction register

Port P7 direction register

Port P8 register

Port P8 direction register

816

916

A16

B16

C16

D16

E16

F16

1016

1116

1216

1316

1416

addresses

Port P0 register

Port P1 register

Port P0 direction register

Port P1 direction register

Port P2 register

Port P3 register

Port P2 direction register

Port P3 direction register

216

316

416

516

616

716

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