7733 datasheet(152/940 Pages) RENESAS

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TIMER A

7733 Group User’s Manual

6–41

6.6 Pulse width modulation (PWM) mode (Bits 1 and 0 of timer Ai mode register = “112”)

In this mode, a pulse which has an arbitrary width is output in succession. (Refer to Table 6.6.1.) Figure

6.6.1 shows the structures of the timer Ai mode register and timer Ai register in the PWM mode.

Table 6.6.1 Specifications of PWM mode

6.6 Pulse width modulation (PWM) mode

Item

Count source

Count operation

Specifications

Clock f2, f16, f64, or f512

q Countdown (Operates as an 8-bit or 16-bit pulse width modulator)

q Reload register’s contents is reloaded at the rising edge of PWM

pulse, and counting is continued.

q A trigger generated during counting does not affect the counting.

PWM period and “H” level width

216 – 1

Period =

[s]

“H” level width =

[s]

<8-bit pulse width modulator>

<16-bit pulse width modulator>

(m + 1)(28 – 1)

Period =

“H” level width =

n(m + 1)

[s]

K: Set value in the timer Ai register

m: Set value in the low-order 8

bits of the timer Ai register

n: Set value in the high-order 8

bits of the timer Ai register

Count start condition

Count stop condition

Interrupt request occurrence timing

Pin TAiIN’s function

Pin TAiOUT’s function

Read from timer

Write to timer

q When a trigger occurs.

q Internal or external trigger can be selected by software.

When the count start flag is cleared to “0.”

At the falling edge of PWM pulse

Programmable I/O port or trigger input

PWM pulse output

An undefined value is read out by reading the timer Ai register.

s While counting is stopped

When a value is written to the timer Ai register, it is written to both

of the reload register and counter.

s While counting is in progress

When a value is written to the timer Ai register, it is written only to

the reload register.

Clocks f2, f16, f64, and f512: Refer to chapter “14. CLOCK GENERATING CIRCUIT.”

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