| 전자부품 데이터시트 검색엔진 |
|
ATtiny5 데이터시트(PDF) 70 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATtiny5 데이터시트(HTML) 70 Page - ATMEL Corporation |
|
70 / 168 page ![]() 70 8127C–AVR–10/09 ATtiny4/5/9/10 Figure 11-13 on page 70 shows the same timing data, but with the prescaler enabled. Figure 11-13. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (fclk_I/O/8) Figure 11-14 on page 70 shows the count sequence close to TOP in various modes. When using phase and frequency correct PWM mode the OCR0x Register is updated at BOTTOM. The timing diagrams will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on. The same renaming applies for modes that set the TOV0 flag at BOTTOM. Figure 11-14. Timer/Counter Timing Diagram, no Prescaling Figure 11-15 on page 71 shows the same timing data, but with the prescaler enabled. OCFnx OCRnx TCNTn OCRnx Value OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2 clk I/O clk Tn (clk I/O/8) TOVn (FPWM) and ICFn (if used as TOP) OCRnx (Update at TOP) TCNTn (CTC and FPWM) TCNTn (PC and PFC PWM) TOP - 1 TOP TOP - 1 TOP - 2 Old OCRnx Value New OCRnx Value TOP - 1 TOP BOTTOM BOTTOM + 1 clk Tn (clk I/O/1) clk I/O |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |