| 전자부품 데이터시트 검색엔진 |
|
ATtiny5 데이터시트(PDF) 38 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATtiny5 데이터시트(HTML) 38 Page - ATMEL Corporation |
|
38 / 168 page ![]() 38 8127C–AVR–10/09 ATtiny4/5/9/10 selected, the low level must be held until the completion of the currently executing instruction to generate an interrupt. 9.3.2 EIMSK – External Interrupt Mask Register • Bits 7:1 – Res: Reserved Bits These bits are reserved and will always read zero. • Bit 0 – INT0: External Interrupt Request 0 Enable When the INT0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), the exter- nal pin interrupt is enabled. The Interrupt Sense Control bits (ISC01 and ISC00) in the External Interrupt Control Register A (EICRA) define whether the external interrupt is activated on rising and/or falling edge of the INT0 pin or level sensed. Activity on the pin will cause an interrupt request even if INT0 is configured as an output. The corresponding interrupt of External Interrupt Request 0 is executed from the INT0 Interrupt Vector. 9.3.3 EIFR – External Interrupt Flag Register • Bits 7:1 – Res: Reserved Bits These bits are reserved and will always read zero. • Bit 0 – INTF0: External Interrupt Flag 0 When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set (one). If the I-bit in SREG and the INT0 bit in EIMSK are set (one), the MCU will jump to the cor- responding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it. This flag is constantly zero when INT0 is configured as a level interrupt. Table 9-2. Interrupt 0 Sense Control ISC01 ISC00 Description 0 0 The low level of INT0 generates an interrupt request. 0 1 Any logical change on INT0 generates an interrupt request. 1 0 The falling edge of INT0 generates an interrupt request. 1 1 The rising edge of INT0 generates an interrupt request. Bit 7 6 543 21 0 0x13 – – – – – – –INTO EIMSK Read/Write RRR RR RR R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 6 543 21 0 0x14 – – – – – – – INTF0 EIFR Read/Write RRR RR RR R/W Initial Value 0 0 0 0 0 0 0 0 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |