ATtiny5 datasheet(52/168 Pages) ATMEL

52 / 168 page

8127C–AVR–10/09

ATtiny4/5/9/10

11. 16-bit Timer/Counter0

11.1 Features

• True 16-bit Design, Including 16-bit PWM

• Two Independent Output Compare Units

• Double Buffered Output Compare Registers

• One Input Capture Unit

• Input Capture Noise Canceler

• Clear Timer on Compare Match (Auto Reload)

• Glitch-free, Phase Correct Pulse Width Modulator (PWM)

• Variable PWM Period

• Frequency Generator

• External Event Counter

• Four independent interrupt Sources (TOV0, OCF0A, OCF0B, and ICF0)

11.2 Overview

The 16-bit Timer/Counter unit allows accurate program execution timing (event management),

wave generation, and signal timing measurement.

Figure 11-1. 16-bit Timer/Counter Block Diagram

Clock Select

Timer/Counter

OCRnA

OCRnB

ICRn

TCNTn

Waveform

Generation

Waveform

Generation

OCnA

OCnB

Noise

Canceler

ICPn

Fixed

TOP

Values

Edge

Detector

Control Logic

= 0

TOP

BOTTOM

Count

Clear

Direction

TOVn

(Int.Req.)

OCnA

(Int.Req.)

OCnB

(Int.Req.)

ICFn (Int.Req.)

TCCRnA

TCCRnB

( From Analog

Comparator Ouput )

Edge

Detector

( From Prescaler )

clk

ATtiny5 데이터시트(PDF) 52 Page - ATMEL Corporation

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