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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATmega64A 데이터시트(PDF) 52 Page - ATMEL Corporation |
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ATmega64A 데이터시트(HTML) 52 Page - ATMEL Corporation |
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52 / 392 page  52 8160C–AVR–07/09 ATmega64A Figure 10-1. Reset Logic 10.0.3 Power-on Reset A Power-on Reset (POR) pulse is generated by an On-chip Detection circuit. The detection level is defined in Table 28-3. The POR is activated whenever V CC is below the detection level. The POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply voltage. A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold voltage invokes the delay counter, which determines how long the device is kept in RESET after V CC rise. The RESET signal is activated again, without any delay, when V CC decreases below the detection level. MCU Control and Status Register (MCUCSR) Brown-Out Reset Circuit BODEN BODLEVEL Delay Counters CKSEL[3:0] CK TIMEOUT DATA BUS Clock Generator SPIKE FILTER Pull-up Resistor JTAG Reset Register Watchdog Oscillator SUT[1:0] Watchdog Timer RESET Pull-up Resistor PEN Reset Circuit L DQ Q Power-On Reset Circuit |
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