| 전자부품 데이터시트 검색엔진 |
|
P89LPC915FDH 데이터시트(PDF) 17 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P89LPC915FDH 데이터시트(HTML) 17 Page - NXP Semiconductors |
|
17 / 75 page ![]() P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 15 December 2009 17 of 75 NXP Semiconductors P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core [1] Input/output for P1.0 to P1.4. Input for P1.5. P2.2 5 Port 2: Port 2 is a single bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-up disabled. The operation of this Port 2 pin as an input and output depends upon the port configuration selected. Refer to Section 8.13.1 “Port configurations” and Table 15 “Static characteristics” for details. This pin has a Schmitt triggered input. VSS 4I Ground: 0 V reference. VDD 12 I Power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Table 6. P89LPC917 pin description …continued Symbol Pin Type Description |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |