P89LPC915FDH datasheet(53/75 Pages) NXP

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P89LPC915_916_917_5

Product data sheet

Rev. 05 — 15 December 2009

53 of 75

NXP Semiconductors

P89LPC915/916/917

8-bit microcontrollers with accelerated two-clock 80C51 core

8.28 User sector security bytes

There are eight User Sector Security Bytes on the P89LPC915/916/917. Each byte

corresponds to one sector. Please see the P89LPC915/916/917

User’s Manual for

additional details.

A/D converter

9.1 General description

The P89LPC915/916/917 devices have a single 8-bit, 4-channel multiplexed

analog-to-digital converter with a DAC module. A block diagram of the A/D converter is

shown in Figure 22. The A/D consists of a 4-input multiplexer which feeds a

sample-and-hold circuit providing an input signal to one of two comparator inputs. The

control logic in combination with the SAR drives a digital-to-analog converter which

provides the other input to the comparator. The output of the comparator is fed to the

SAR.

9.2 Features

I Single 8-bit, 4-channel multiplexed input, successive approximation A/D converter.

I Four A/D result registers.

I Six operating modes:

N Fixed channel, single conversion mode.

N Fixed channel, continuous conversion mode.

N Auto scan, single conversion mode.

N Auto scan, continuous conversion mode.

N Dual channel, continuous conversion mode.

N Single step mode.

I Three conversion start modes:

N Timer triggered start.

N Start immediately.

N Edge triggered.

I 8-bit conversion time of ≥3.9 µs at an A/D clock of 3.3 MHz.

I Interrupt or polled operation.

I Boundary limits interrupt.

I DAC output to a port pin with high output impedance.

I Clock divider.

I Power-down mode.

P89LPC915FDH 데이터시트(PDF) 53 Page - NXP Semiconductors