PCIMX258CJM4A datasheet(50/144 Pages) FREESCALE

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i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3

Freescale Semiconductor

Timing parameters for UDMA in-burst are listed in Table 37.

3.7.2.4

UDMA Out-Transfer Timing

Figure 18 shows the timing for start of UDMA out-transfer.

Figure 18. Timing for UDMA Out-Transfer Start

Table 37. Timing Parameters for UDMA In-Burst

ATA

Parameter

Spec.

Parameter

Value

Required Conditions

tack

tack(min.) = (time_ack

× T) – (tskew1 + tskew2)

time_ack

tenv

tenv(min.) = (time_env

× T) – (tskew1 + tskew2)

tenv(max.) = (time_env

× T) + (tskew1 + tskew2)

time_env

tds

tds1

tds – (tskew3) – ti_ds > 0

tskew3, ti_ds, ti_dh

should be low enough

tdh

tdh1

tdh – (tskew3) –ti_dh > 0

tcyc

tc1

(tcyc – tskew) > T

T big enough

trp

trp(min.) = time_rp

× T – (tskew1 + tskew2 + tskew6)

time_rp

—tx11

1 There is a special timing requirement in the ATA host that requires the internal DIOW to go only high three clocks after the last

active edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.

Make ton and toff big enough to avoid bus contention.

(time_rp

× T) – (tco + tsu + 3T + 2 × tbuf + 2 × tcable2) > trfs (drive)

time_rp

tmli

tmli1

tmli1(min.) = (time_mlix + 0.4)

× T

time_mlix

tzah

tzah(min.) = (time_zah + 0.4)

× T

time_zah

tdzfs

tdzfs = (time_dzfs

× T) – (tskew1 + tskew2)

time_dzfs

tcvh

tcvh = (time_cvh

× T) – (tskew1 + tskew2)

time_cvh

—ton

toff

ton = time_on

× T – tskew1

toff = time_off

× T – tskew1

—

DMARQ

ADDR

DIOW

DIOR

IORDY

DATA WRITE

DMACK

tack

tenv

buffer_en

ton

tdzfs tdvs tdvh tdvs

tcyc

trfs1

tli1

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