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PCIMX258CJM4A 데이터시트(PDF) 98 Page - Freescale Semiconductor, Inc |
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PCIMX258CJM4A 데이터시트(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 144 page ![]() i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3 98 Freescale Semiconductor Figure 70. Active-Low-Reset SIM Card Reset Sequence Table 74 defines the general timing requirements for the SIM interface. 3.7.14.2 SIM Power-Down Sequence Figure 71 shows the SIM interface power-down AC timing diagram. Table 75 shows the timing requirements for parameters (SI7–SI10) shown in the figure. The power-down sequence for the SIM interface is as follows: •SIMx_SIMPDy port detects the removal of the SIM Card •SIMx_RSTy is negated •SIMx_CLKy is negated •SIMx_DATAy_RX_TX is negated •SIMx_SVENy is negated Each of the above steps requires one CKIL period (usually 32 kHz). Power-down may be initiated by a SIM card removal detection; or it may be launched by the processor. Table 74. Timing Specifications, Active-Low-Reset SIM Card Reset Sequence Ref No. Min. Max. Unit 1 — 200 clk cycles 2 400 40,000 clk cycles 3 40,000 — clk cycles SIMx_SVENy SIMx_CLKy SIMx_DATAy_RX_TX 2 T0 1 RESPONSE SIMx_RSTy T1 3 3 |
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