CDCE72010RGCT datasheet(18/73 Pages) TI

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SPI CONTROL INTERFACE

Bit0

Bit1

……

Bit29

Bit30

Bit31

SPI_CLK

SPI_MOSI

SPI_LE

Bit30Bit31

SPI_CLK

SPI_MOSI

SPI_MISO

SPI_LE

Bit0Bit1

Bit2

CDCE72010

SCAS858A – JUNE 2008 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com

The serial interface of the CDCE72010 is a simple bidirectional SPI interface for writing and reading to and from

the registers of the device. It consists of four control lines: SPI_CLK, SPI_MOSI, SPI_MISO, and SPI_LE. There

are twelve 28-bit wide registers that can be saved to the EEPROM on-chip, and one status register that is a read

only register. Those registers can be addressed by the four LSBs of a transferred word (bit 0, 1, 2, and bit 3).

Every transmitted word must have 32 bits, starting with LSB first. Each word can be written separately. The

transfer is initiated with the falling edge of SPI_LE; as long as SPI_LE is high, no data can be transferred. During

SPI_LE low, data can be written. The data has to be applied at SPI_MOSI and has to be stable before the rising

edge of SPI_CLK. The transmission is finished by a rising edge of SPI_LE.

Figure 11. Timing Diagram for SPI Write Command

Figure 12. Timing Diagram for SPI Read Command

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