전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CDCE72010RGCT 데이터시트(PDF) 20 Page - Texas Instruments

Click here to check the latest version.
부품명 CDCE72010RGCT
상세설명  Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

CDCE72010RGCT 데이터시트(HTML) 20 Page - Texas Instruments

Back Button CDCE72010RGCT Datasheet HTML 16Page - Texas Instruments CDCE72010RGCT Datasheet HTML 17Page - Texas Instruments CDCE72010RGCT Datasheet HTML 18Page - Texas Instruments CDCE72010RGCT Datasheet HTML 19Page - Texas Instruments CDCE72010RGCT Datasheet HTML 20Page - Texas Instruments CDCE72010RGCT Datasheet HTML 21Page - Texas Instruments CDCE72010RGCT Datasheet HTML 22Page - Texas Instruments CDCE72010RGCT Datasheet HTML 23Page - Texas Instruments CDCE72010RGCT Datasheet HTML 24Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 73 page
background image
CDCE72010 Default Configuration
CDCE72010
SCAS858A – JUNE 2008 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
The CDCE72010 on-board EEPROM has been factory preset to the default settings listed in Table 5
Table 5. CDCE72010 Default Configuration Settings
REGISTER
DEFAULT SETTING
REGISTER
DEFAULT SETTING
REG0000
002C0040
REG0007
EB040717
REG0001
83840051
REG0008
010C0158
REG0002
83400002
REG0009
01000049
REG0003
83400003
REG0010
0BFC07CA
REG0004
81800004
REG0011
C000058B
REG0005
81800005
REG0012
61E09B0C
REG0006
EB040006
The default configuration programmed in the EEPROM is: a 10MHz primary reference single-ended, a
491.52MHz LVPECL VCXO running at 80kHz, and PFD with a 10Hz external loop filter. Reference Auto Select is
off, M divider is set for 125, N divider is set to 768, charge pump current is set to 2.2mA, and feedback divider is
set to divide by 8. Divider 1 is set to divide by 4, Dividers 2 and 3 are set to divide by 1, Dividers 4 and 5 are set
to divide by 2, Dividers 6 and 7 are set to divide by 8, and Divider 8 is set to divide by 16.Output0:LVCMOS,
Output1:Hi-LVPECL,
Output2:
Hi-LVPECL,
Output3:Hi_LVPECL,
Output4:LVPECL,
Output5:LVPECL,
Output6:Hi-LVDS, Output7:Hi-LVDS, Output8:LVCMOS and Output9:LVCMOS.
20
Submit Documentation Feedback
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): CDCE72010



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com