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UJA1075TW/5V0/WD 데이터시트(PDF) 28 Page - NXP Semiconductors

부품명 UJA1075TW/5V0/WD
상세설명  High-speed CAN/LIN core system basis chip
PDF  53 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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UJA1075TW/5V0/WD 데이터시트(HTML) 28 Page - NXP Semiconductors

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UJA1075_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 27 May 2010
28 of 53
NXP Semiconductors
UJA1075
High-speed CAN/LIN core system basis chip
7.
Limiting values
Table 8.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Vx
voltage on pin x
DC value
pins V1, V2 and INTN
−0.3
7
V
pins TXDC, RXDC, EN, SDI, SDO, SCK, SCSN,
TXDL, RXDL, RSTN and WDOFF
−0.3
VV1 + 0.3
V
pin VEXCC
VV1 − 0.3
VV1 + 0.35 V
pins WAKE1, WAKE2 and WBIAS; with respect to
any other pin
−58
+58
V
pin LIMP and BAT
−0.3
+40
V
pin VEXCTRL
−0.3
VBAT + 0.3 V
pins CANH, CANL, SPLIT and LIN; with respect to
any other pin
−58
+58
V
pin DLIN; with respect to any other pin
VBAT − 0.3 +58
V
IR(V1-BAT)
reverse current from
pin V1 to pin BAT
VV1 ≤ 5V
[1]
-
250
mA
IDLIN
current on pin DLIN
−65
0
mA
Vtrt
transient voltage
on pins
BAT: via reverse polarity diode/capacitor
CANL, CANH, SPLIT: coupling with two capacitors
on the bus lines
LIN: coupling via 1 nF capacitor
DLIN: via 1 k
Ω resistor
[2]
−150
+100
V
VESD
electrostatic
discharge voltage
IEC 61000-4-2
[3]
pins BAT with capacitor, CANH, CANL and LIN; via
a series resistor on pins SPLIT, DLIN, WAKE1 and
WAKE2
[4]
−6+6
kV
HBM
[5]
pins CANH, CANL, LIN, SPLIT, DLIN, WAKE1 and
WAKE2
[6]
−8+8
kV
pin BAT; referenced to ground
−4+4
kV
pin TEST2; referenced to pin BAT
−1.25
+2
kV
pin TEST2; referenced to other reference pins
−2+2
kV
any other pin
−2+2
kV
MM
[7]
any pin
−300
+300
V
CDM
[8]
corner pins
−750
+750
V
any other pin
−500
+500
V
Tvj
virtual junction
temperature
[9]
−40
+150
°C
Tstg
storage temperature
−55
+150
°C



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