PC912XDP512F0MPVR datasheet(875/1348 Pages) FREESCALE

부품명	PC912XDP512F0MPVR

상세설명	HCS12X Microcontrollers

PDF	1348 Pages

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제조업체	FREESCALE [Freescale Semiconductor, Inc]

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875 / 1348 page

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

877

22.3.2.68 Port AD1 Data Direction Register 0 (DDR0AD1)

Read: Anytime.

Write: Anytime.

This register configures pin PAD[23:16] as either input or output.

76543210

DDR0AD123 DDR0AD122 DDR0AD121 DDR0AD120 DDR0AD119 DDR0AD118 DDR0AD117 DDR0AD116

Reset

00000000

Figure 22-70. Port AD1 Data Direction Register 0 (DDR0AD1)

Table 22-61. DDR0AD1 Field Descriptions

Field

Description

7–0

DDR0AD1[23:16]

Data Direction Port AD1 Register 0

0 Associated pin is conﬁgured as input.

1 Associated pin is conﬁgured as output.

Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is

read on PTAD10 register, when changing the DDR0AD1 register.

Note: To use the digital input function on Port AD1 the ATD1 digital input enable register (ATD1DIEN0) has

to be set to logic level “1”.

PC912XDP512F0MPVR 데이터시트(PDF) 875 Page - Freescale Semiconductor, Inc