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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MC68HC705P9CS 데이터시트(PDF) 114 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 데이터시트(HTML) 114 Page - Freescale Semiconductor, Inc |
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114 / 160 page  Timer Technical Data MC68HC705P9 — Rev. 4.0 114 Timer MOTOROLA 9.7.5 Input Capture Registers When a selected edge occurs on the TCAP pin, the current high and low bytes of the 16-bit counter are latched into the read-only input capture registers (ICRH and ICRL). Reading ICRH before reading ICRL inhibits further captures until ICRL is read. Reading ICRL after reading the timer status register clears the input capture flag (ICF). Writing to the input capture registers has no effect. NOTE: To prevent interrupts between readings of ICRH and ICRL, set the interrupt mask (I bit) in the condition code register before reading ICRH, and clear the mask after reading ICRL. $0014 Bit 7 6 54321 Bit 0 Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Unaffected by reset $0015 7 6 543210 Read: Bit 7 6 5 4 3 2 1 Bit 0 Write: Reset: Unaffected by reset = Unimplemented Figure 9-16. Input Capture Registers (ICRH and ICRL) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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