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MPC8306EC 데이터시트(PDF) 46 Page - Freescale Semiconductor, Inc |
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MPC8306EC 데이터시트(HTML) 46 Page - Freescale Semiconductor, Inc |
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46 / 76 page ![]() MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0 46 Freescale Semiconductor JTAG Figure 34 shows the SPI timing in slave mode (external clock). Figure 34. SPI AC Timing in Slave Mode (External Clock) Diagram Figure 35 shows the SPI timing in master mode (internal clock). Figure 35. SPI AC Timing in Master Mode (Internal Clock) Diagram 20 JTAG This section describes the DC and AC electrical specifications for the IEEE Std. 1149.1™ (JTAG) interface of the MPC8306. 20.1 JTAG DC Electrical Characteristics Table 50 provides the DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface of the MPC8306. Table 50. JTAG Interface DC Electrical Characteristics Characteristic Symbol Condition Min Max Unit Output high voltage VOH IOH =–6.0mA 2.4 — V Output low voltage VOL IOL =6.0 mA — 0.5 V Output low voltage VOL IOL =3.2 mA — 0.4 V SPICLK (Input) tNEIXKH tNEIVKH tNEKHOV Input Signals: SPIMOSI (See Note) Output Signals: SPIMISO (See Note) Note: The clock edge is selectable on SPI. SPICLK (Output) tNIIXKH tNIKHOV Input Signals: SPIMISO (See Note) Output Signals: SPIMOSI (See Note) Note: The clock edge is selectable on SPI. tNIIVKH |
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