MPC8306EC datasheet(8/76 Pages) FREESCALE

8 / 76 page

MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0

Freescale Semiconductor

Electrical Characteristics

2.1.2

Power Supply Voltage Specification

Table 2 provides the recommended operating conditions for the MPC8306. Note that these values are the

recommended and tested operating conditions. Proper device operation outside of these conditions is not

guaranteed.

Figure 2 shows the undershoot and overshoot voltages at the interfaces of the MPC8306

Figure 2. Overshoot/Undershoot Voltage for GVDD/OVDD

Table 2. Recommended Operating Conditions

Characteristic

Symbol

Recommended

Value

Unit

Notes

Core supply voltage

VDD

1.0 V ± 50 mV

PLL supply voltage

AVDD1

AVDD2

AVDD3

1.0 V ± 50 mV

DDR2 DRAM I/O voltage

GVDD

1.8 V ± 100 mV

Local bus, DUART, system control and power management, I2C,

SPI, MII, RMII, MII management, eSDHC, FlexCAN, USB and

JTAG I/O voltage

OVDD

3.3 V ± 300 mV

1, 3

Junction temperature

TA/TJ

0to105

C2

Note:

1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative

direction.

2. Minimum temperature is specified with TA(Ambient Temperature); maximum temperature is specified with TJ(Junction

Temperature).

3. OVDD here refers to NVDDA, NVDDB,NVDDC, NVDDF, NVDDG, and NVDDH from the ball map.

GND

GND – 0.3 V

GND – 0.7 V

Not to Exceed 10%

G/OVDD + 20%

G/OVDD

G/OVDD + 5%

of tinterface1

1. tinterface refers to the clock period associated with the bus clock interface.

VIH

VIL

Note:

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