MPC5125 datasheet(43/94 Pages) FREESCALE

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Electrical and Thermal Characteristics

MPC5125 Microcontroller Data Sheet, Rev. 4

Freescale Semiconductor

NOTE

The maximum power depends on the supply voltage, process corner, junction temperature,

and the concrete application and clock configurations.

4.1.6

Thermal Characteristics

4.1.6.1

Heat Dissipation

An estimation of the chip-junction temperature, TJ, can be obtained from the following equation:

TJ = TA+(RJA  PD)

Eqn. 3

where:

TA = ambient temperature for the package (ºC)

RJA = junction to ambient thermal resistance (ºC/W)

PD = power dissipation in package (W)

3 Doze, Nap, and Sleep power are measured with the e300 core in Doze/Nap/Sleep mode; the system

oscillator, system PLL, and core PLL active; and all other system modules inactive.

4 Deep-sleep power is measured with the e300 core in Sleep mode. The system oscillator, system PLL, core

PLL, and other system modules are inactive.

5 PLL power is measured at AV

DD_SPLL = AVDD_CPLL = AVDD_OSC_TMPS = 3.3 V, TJ = 25 C.

6 Unloaded typical I/O power is measured at V

DD_IO = 3.3 V, VDD_MEM_IO = 1.8 V, TJ = 25 C.

Table 11. Thermal Resistance Data1

NOTES:

1 Thermal characteristics are targets based on simulation that are subject to change per device characterization.

Rating

Conditions

Sym Value Unit SpecID

Thermal resistance junction-to-ambient natural

convection2

2 Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets JEDEC

specification for this package.

Single layer board – 1s

RJA

°C/W

D6.1

Thermal resistance junction-to-ambient natural

convection2

Four layer board – 2s2p

RJA

°C/W

D6.2

Thermal resistance junction-to-moving-air ambient2

@ 200 ft./min., single layer board – 1s RJMA

°C/W

D6.3

Thermal resistance junction-to-moving-air ambient2

@ 200 ft./min., four layer board 2s2p

RJMA

°C/W

D6.4

Thermal resistance junction-to-board3

3 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for

the specified package.

—RJB

°C/W

D6.5

Thermal resistance junction-to-case4

4 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used

for the case temperature. Reported value includes the thermal resistance of the interface layer.

—RJC

°C/W

D6.6

Junction-to-package-top natural convection5

5 Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as

Psi-JT.

Natural convection



3°C/W

D6.7

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