C6416 datasheet(22/134 Pages) TI1

22 / 134 page

SMJ320C6414, SMJ320C6415, SMJ320C6416

FIXEDPOINT DIGITAL SIGNAL PROCESSORS

SGUS050A − JANUARY 2004 − REVISED MARCH 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

peripheral register descriptions (continued)

Table 17. HPI Registers

HEX ADDRESS RANGE

ACRONYM

COMMENTS

−

HPID

HPI data register

Host read/write access only

0188 0000

HPIC

HPI control register

HPIC has both Host/CPU

read/write access

0188 0004

HPIA

(HPIAW)†

HPI address register (Write)

HPIA has both Host/CPU

0188 0008

HPIA

(HPIAR)†

HPI address register (Read)

HPIA has both Host/CPU

read/write access

0188 000C − 0189 FFFF

−

Reserved

018A 0000

TRCTL

HPI transfer request control register

018A 0004 − 018B FFFF

−

Reserved

† Host access to the HPIA register updates both the HPIAW and HPIAR registers. The CPU can access HPIAW and HPIAR independently.

Table 18. GPIO Registers

HEX ADDRESS RANGE

ACRONYM

01B0 0000

GPEN

GPIO enable register

01B0 0004

GPDIR

GPIO direction register

01B0 0008

GPVAL

GPIO value register

01B0 000C

−

Reserved

01B0 0010

GPDH

GPIO delta high register

01B0 0014

GPHM

GPIO high mask register

01B0 0018

GPDL

GPIO delta low register

01B0 001C

GPLM

GPIO low mask register

01B0 0020

GPGC

GPIO global control register

01B0 0024

GPPOL

GPIO interrupt polarity register

01B0 0028 − 01B0 01FF

−

Reserved

01B0 0200

DEVICE_REV

Silicon Revision Identification Register

(For more details, see the device characteristics listed in Table 1.)

01B0 0204 − 01B3 FFFF

−

Reserved

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