STA339BW datasheet(63/77 Pages) STMICROELECTRONICS

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STA339BW

Doc ID 15251 Rev 5

63/77

6.13

Variable max power correction registers (addr 0x27 - 0x28)

MPCC bits determine the 16 MSBs of the MPC compensation coefficient. This coefficient is

used in place of the default coefficient when MPCV = 1.

6.14

Variable distortion compensation registers (addr 0x29 -

0x2A)

DCC bits determine the 16 MSBs of the Distortion compensation coefficient. This coefficient

is used in place of the default coefficient when DCCV = 1.

0x36

Channel 3 - Postscale

C3PstS

0x7FFFFF

0x37

TWARN/OC - Limit

TWOCL

0x5A9DF7

0x38

Channel 1 - Mix 1

C1MX1

0x7FFFFF

0x39

Channel 1 - Mix 2

C1MX2

0x000000

0x3A

Channel 2 - Mix 1

C2MX1

0x000000

0x3B

Channel 2 - Mix 2

C2MX2

0x7FFFFF

0x3C

Channel 3 - Mix 1

C3MX1

0x400000

0x3D

Channel 3 - Mix 2

C3MX2

0x400000

0x3E

Unused

0x3F

Unused

Table 72.

RAM block for biquads, mixing, scaling and bass management (continued)

Index (decimal)

Index (hex)

RAM block setting

Coefficient

Default

MPCC15

MPCC14

MPCC13

MPCC12

MPCC11

MPCC10

MPCC9

MPCC8

101

MPCC7

MPCC6

MPCC5

MPCC4

MPCC3

MPCC2

MPCC1

MPCC0

000

DCC15

DCC14

DCC13

DCC12

DCC11

DCC10

DCC9

DCC8

001

DCC7

DCC6

DCC5

DCC4

DCC3

DCC2

DCC1

DCC0

001

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