STA369BWS datasheet(73/89 Pages) STMICROELECTRONICS

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STA369BWS

Doc ID 16861 Rev 4

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6.17

Short-circuit protection mode registers SHOK (addr 0x46)

The following power-bridge pins short-circuit protection are implemented in STA369BWS:

OUTxx vs GNDx

OUTxx vs VCCx

The protection is enabled when register MISC2 (address 0x4C) bit SHEN is set to 1. The

protection checks the short circuit when EAPD bit is toggled from 0 to 1 (that is, the power

bridge is switched on), and only if it passes the test (no short) will the power bridge leave the

3-state condition.

GNDxx equal to 0 means that OUTxx is shorted to ground, while the same value on VCCxx

means that OUTxx is shorted to VCC.

To be noted that once the check is performed, and the tristate released, the short-circuit

protection is not active again until the next EAPD 0 -> 1 toggling. It means that shorts

happening during normal operation are not detected.

The content of register 0x46 is meaningful only after EAPD bit is set to 1 at least once.

The short-circuit protection implemented is effective only in BTL configuration, and it must

not be activated (that is, SHEN must be 0) in single-ended applications.

Table 85.

Bits VRESEN and VRESTG description

VRESEN

VRESTG

Mode

Extra volume resolution disabled

Fine volume tuning enabled and applied immediately

Fine volume tuning enabled and applied when master or

channel volume is updated

GND1A

GND1B

GND2A

GND2B

VCC1A

VCC1B

VCC2A

VCC2B

111

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