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STA369BWS 데이터시트(PDF) 11 Page - STMicroelectronics |
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STA369BWS 데이터시트(HTML) 11 Page - STMicroelectronics |
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11 / 89 page ![]() STA369BWS Pin connections Doc ID 16861 Rev 4 11/89 2 Pin connections 2.1 Connection diagram Figure 2. Pin connection PowerSSO-36 (top view) 2.2 Pin description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 VDD_DIG GND_DIG SCL SDA INT_LINE RESET SDI LRCKI BICKI XTI GND_PLL FILTER_PLL VDD_PLL PWRDN GND_DIG VDD_DIG TWARN / OUT4A EAPD / OUT4B GND_SUB SA TEST_MODE VSS VCC_REG OUT2B GND2 VCC2 OUT2A OUT1B VCC1 GND1 OUT1A GND_REG VDD CONFIG OUT3B / FFX3B OUT3A / FFX3A D05AU1638 EP, exposed pad (device ground) Table 2. Pin description Pin Type Name Description 1 GND GND_SUB Substrate ground 2I SA I2C select address (pull-down) 3 I TEST_MODE This pin must be connected to ground (pull-down) 4 I/O VSS Internal reference at VCC - 3.3 V 5 I/O VCC_REG Internal VCC reference 6 O OUT2B Output half-bridge channel 2B 7 GND GND2 Power negative supply 8 Power VCC2 Power positive supply 9 O OUT2A Output half-bridge channel 2A 10 O OUT1B Output half-bridge channel 1B |
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