| 전자부품 데이터시트 검색엔진 |
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STA381BWS 데이터시트(PDF) 74 Page - STMicroelectronics |
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STA381BWS 데이터시트(HTML) 74 Page - STMicroelectronics |
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74 / 171 page ![]() Register description: New Map STA381BWS 74/171 Doc ID 018937 Rev 6 ERTHx[6:0]. Setting the ERTHx[7] bits to 1 automatically selects the anticlipping mode. The release of the limiter, when the gain is again increased, is dependent on an RMS-detect algorithm. The output of the volume/limiter block is passed through an RMS filter. The output of this filter is compared to the release threshold, determined by the release threshold register. When the RMS filter output falls below the release threshold, the gain is again increased at a rate dependent upon the release rate register. The gain can never be increased past its set value and, therefore, the release only occurs if the limiter has already reduced the gain. The release threshold value can be used to set what is effectively a minimum dynamic range, this is helpful as overlimiting can reduce the dynamic range to virtually zero and cause program material to sound “lifeless”. In anticlipping mode, the attack and release thresholds are set relative to full-scale. In DRC mode (bit D0 reg 0x0A set to 1), the attack threshold is set relative to the maximum volume setting of the channels mapped to that limiter and the release threshold is set relative to the maximum volume setting plus the attack threshold. |
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