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SPEAR1340 데이터시트(PDF) 17 Page - STMicroelectronics

부품명 SPEAR1340
상세설명  Dual-core Cortex A9 HMI embedded MPU
PDF  200 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1340 데이터시트(HTML) 17 Page - STMicroelectronics

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SPEAr1340
Device functions
Doc ID 023063 Rev 4
17/200
Port Multiplier with command-based switching
Disabling RX and TX Data clocks during power down modes
Integrated SATA link layer and transport layer logic
Supports PIO, first party and legacy DMA modes
Supports legacy command queuing
Supports ATA and ATAPI master-only emulation mode (for instance, register and
command compatible with these standards)
Power-down mode
Data scrambling
CRC computation
Automatic data flow control
Far end loop-back re-timed
2.12
SATA/PCIe physical interface (MiPHY)
The MiPHY macrocell implements the lower (physical) layer protocols providing data
transmission and reception over a dual differential pair cable. The TX (transmit) and RX
(receive) serial channels operate plesiochronously (NRZ). The macrocell can be used in
Host or Device applications.
Main features:
Serial transceiver (PHYsical layer) serializer and deserializer
Direct support for 1.5/ 3.0 and 1.25/ 2.5/ 5.0 Gbit/s bit rates
20-bit parallel interface
Comma detect to provide word alignment of incoming serial stream
SSC modulation
Integrated impedance adaptation to transmission line characteristics
Out-of-band (OOB) signaling
Supported 1.2 V and 2.5 V power supply
High-performance PLL (input reference 100 MHz for PCIe and 100 or 25 MHz for
SATA)
Programmable TX buffer pre-emphasis, slew-rate and amplitude
Dedicated TX buffer regulator for:
Transmit buffer noise immunity
Buffer level stability



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