SPEAR1340 datasheet(174/200 Pages) STMICROELECTRONICS

174 / 200 page

Timing characteristics

SPEAr1340

174/200

Doc ID 023063 Rev 4

5.11.2

CompactFlash true IDE PIO mode/UDMA mode

This section describes the timing characteristics for MCIF when interfacing CompactFlash in

true IDE mode PIO mode and UDMA mode.

The data in Table 88 has been measured in the following configuration:

– True IDE PIO mode = Mode 6

– HCLK period = 6 ns

– CF/XD (clk_xin) base clock period obtained by programming the MISC register

MCIF_CFXD_CLK_SYNT.

–Tclk_xin = T

– t0 is the minimum total cycle time. t0 must satisfy the following constraint

≥ t2 + t2i

t2 is the minimum command active time.

t2i is the minimum command active recovery time or command inactive time.

Figure 35.

MCIF - CF true IDE PIO mode waveform

Table 88.

MCIF - CF true IDE PIO mode timing characteristics

Symbol

Description

Min

Max

Unit

Cycle time

18*T

Address Valid to IORD/IOWR setup

2*T

IORD/-IOWR

10*T

t2i

IORD/-IOWR recovery time

8*T

IOWR data setup

9.5*T

IOWR data hold

T - 3.2

IORD data setup

5(1)

t5 and t6 are the minimum timing requirements the external card has to respect in order to ensure

correct Read Data sampling inside SPEAr1340.

IORD data hold

4(1)

DATAOUT

DATAIN

MCIF_Addr2,

MCIF_Addr1_CLE_CLK

MCIF_Addr0_ALE

MCIF_nCS0_nCE

MCIF_nCS1

MCIF_nIOWR_nWE

MCIF_nIORD_nRE

MCIF_Data[15:0]

SPEAR1340 데이터시트(PDF) 174 Page - STMicroelectronics

SPEAR1340 데이터시트(HTML) 174 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL