WM8940CGEFLSLASHV datasheet(62/91 Pages) WOLFSON

62 / 91 page

WM8940

Production Data

PD, Rev 4.3, November 2011

A-law Companding

100

120

0.2

0.4

0.6

0.8

Normalised Input

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Figure 32 A-Law Companding

GENERAL PURPOSE INPUT/OUTPUT

In 2-wire mode, the CSB pin is not required and it can be used as a GPIO pin. In 3 wire mode,

the MODE / GPIO can be configured as a GPIO by setting the MODE_GPIO register bit

Whichever pin is used for GPIO, it is controlled from the GPIO control register R8. The GPIOSEL bits

allow the chosen pin to be configured to perform a variety of useful tasks as shown in Table 57.

Note that SLOWCLKEN must be enabled when using the jack detect function.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

GPIO

control

5:4

OPCLKDIV

PLL Output clock division ratio

00=divide by 1

01=divide by 2

10=divide by 3

11=divide by 4

GPIOPOL

GPIO Polarity invert

0=Non inverted

1=Inverted

2:0

GPIOSEL

000

CSB/GPIO pin function select:

000=CSB input

001= Jack insert detect

010=Temp ok

011=Amute active

100=SYSCLK clock o/p

101=PLL lock

110=Reserved

111=Reserved

Table 52 CSB/GPIO Control

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