WM8940CGEFLSLASHV datasheet(28/91 Pages) WOLFSON

28 / 91 page

WM8940

Production Data

PD, Rev 4.3, November 2011

INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC)

The WM8940 has an automatic PGA gain control circuit, which can function as an input peak limiter

or as an automatic level control (ALC).

The Automatic Level Control (ALC) provides continuous adjustment of the input PGA in response to

the amplitude of the input signal. A digital peak detector monitors the input signal amplitude and

compares it to a register defined threshold level (ALCLVL).

If the signal is below the threshold, the ALC will increase the gain of the PGA at a rate set by

ALCDCY. If the signal is above the threshold, the ALC will reduce the gain of the PGA at a rate set

by ALCATK.

The ALC has two modes selected by the ALCMODE register: normal mode and peak limiter mode.

The ALC/limiter function is enabled by setting the register bit R32[8] ALCSEL.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R32 (20h)

ALC Control 1

2:0

ALCMIN

[2:0]

000 (-12dB)

Set minimum gain of PGA

000 = -12dB

001 = -6dB

010 = 0dB

011 = +6dB

100 = +12dB

101 = +18dB

110 = +24dB

111 = +30dB

5:3

ALCMAX

[2:0]

111

(+35.25dB)

Set Maximum Gain of PGA

111 = +35.25dB

110 = +29.25dB

101 = +23.25dB

100 = +17.25dB

011 = +11.25dB

010 = +5.25dB

001 = -0.75dB

000 = -6.75dB

ALCSEL

ALC function select (see Note)

0 = ALC disabled

1 = ALC Enabled

WM8940CGEFL/V 데이터시트(PDF) 28 Page - Wolfson Microelectronics plc

WM8940CGEFL/V 데이터시트(HTML) 28 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

데이터시트 다운로드

링크 URL