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WM8940CGEFL/V 데이터시트(PDF) 77 Page - Wolfson Microelectronics plc |
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WM8940CGEFL/V 데이터시트(HTML) 77 Page - Wolfson Microelectronics plc |
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77 / 91 page ![]() Production Data WM8940 w PD, Rev 4.3, November 2011 77 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 13:0 NF3_A1 0000h Notch Filter 3 a1 coefficient Analogue to Digital Converter (ADC) 24 (18h) 15:9 00h Reserved 8 LIMEN 0 Enable the DAC digital limiter: 0=disabled 1=enabled Output Signal Path 24 (18h) 7:4 LIMDCY 0011 DAC Limiter Decay time (per 6dB gain change) for 44.1kHz sampling. Note that these will scale with sample rate: 0000=750us 0001=1.5ms 0010=3ms 0011=6ms 0100=12ms 0101=24ms 0110=48ms 0111=96ms 1000=192ms 1001=384ms 1010=768ms 1011 to 1111=1.536s Output Signal Path 3:0 LIMATK 0010 DAC Limiter Attack time (per 6dB gain change) for 44.1kHz sampling. Note that these will scale with sample rate. 0000=94us 0001=188s 0010=375us 0011=750us 0100=1.5ms 0101=3ms 0110=6ms 0111=12ms 1000=24ms 1001=48ms 1010=96ms 1011 to 1111=192ms Output Signal Path 25 (19h) 15:7 000h Reserved 6:4 LIMLVL 000 DAC Limiter Programmable signal threshold level (determines level at which the limiter starts to operate) 000=-1dB 001=-2dB 010=-3dB 011=-4dB 100=-5dB 101 to 111=-6dB Output Signal Path |
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