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WM8980CGEFL/V 데이터시트(PDF) 103 Page - Wolfson Microelectronics plc |
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WM8980CGEFL/V 데이터시트(HTML) 103 Page - Wolfson Microelectronics plc |
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103 / 123 page ![]() Pre-Production WM8980 w PP, Rev 3.8, May 2012 103 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 3:0 LIMATK 0010 DAC Limiter Attack time (per 6dB gain change) for 44.1kHz sampling. Note that these will scale with sample rate. 0000=94us 0001=188s 0010=375us 0011=750us 0100=1.5ms 0101=3ms 0110=6ms 0111=12ms 1000=24ms 1001=48ms 1010=96ms 1011 to 1111=192ms Output Signal Path 25 (19h) 8:7 00 Reserved 6:4 LIMLVL 000 Programmable signal threshold level (determines level at which the DAC limiter starts to operate) 000=-1dB 001=-2dB 010=-3dB 011=-4dB 100=-5dB 101 to 111=-6dB Output Signal Path 3:0 LIMBOOST 0000 DAC Limiter volume boost (can be used as a stand alone volume boost when LIMEN=0): 0000=0dB 0001=+1dB 0010=+2dB … (1dB steps) 1011=+11dB 1100=+12dB 1101 to 1111=reserved Output Signal Path 27 (1Bh) 8 NFU 0 Notch filter update. The notch filter values used internally only update when one of the NFU bits is set high. Analogue to Digital Converter (ADC) 7 NFEN 0 Notch filter enable: 0=Disabled 1=Enabled Analogue to Digital Converter (ADC) 6:0 NFA0[13:7] 0000000 Notch Filter a0 coefficient, bits [13:7] Analogue to Digital Converter (ADC) 28 (1Ch) 8 NFU 0 Notch filter update. The notch filter values used internally only update when one of the NFU bits is set high. Analogue to Digital Converter (ADC) 7 0 Reserved 6:0 NFA0[6:0] 0000000 Notch Filter a0 coefficient, bits [6:0] Analogue to Digital Converter (ADC) |
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