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AT45DB081D 데이터시트(PDF) 51 Page - Analog Devices

부품명 AT45DB081D
상세설명  8-megabit 2.5V or 2.7V DataFlash
PDF  53 Pages
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AT45DB081D 데이터시트(HTML) 51 Page - Analog Devices

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3596O–DFLASH–1/2013
AT45DB081D
28. Revision History
Revision Level – Release Date
History
A – November 2005
Initial Release
B – March 2006
Added Preliminary.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
Added “Legacy Commands” table.
C – July 2006
Corrected PA3 in opcode 50h for addressing sequence with
standard page size. Corrected Chip Erase opcode from 7CH to
C7H. Clarified the commands B and C usage for operation mode.
D – November 2006
Removed Preliminary.
Added errata regarding Chip Erase.
Changed various timing parameters under Table 18-4.
E – February 2007
Removed RDY/BUSY pin references.
F – August 2007
Removed SER/BYTE statement from SI and SO pin descriptions in
Table 2-1.
Added additional text to “power of 2” binary page size option.
Changed tVSCL from 50μs to 70μs.
Changed tRDPD from 30μs to 35μs.
G – January 2008
Added additional text, in “power of 2” binary page size option, to
indicate that the address format is changed for devices with page
size set to 256-bytes.
Corrected typographical error to indicate that Figure 13-1 indicates
Program Configuration Register.
H – January 2008
Removed DataFlash card pinout.
I – April 2008
Added part number ordering code details for suffixes SL954/955
Added ordering code details.
J – February 2009
Changed tDIS (Typ and Max) to 27ns and 35ns, respectively.
K – March 2009
Changed Deep Power-Down Current values
- Increased typical value from 5μA to 15μA.
- Increased maximum value from 15μA to25 μA.
L – April 2009
Updated Absolute Maximum Ratings
Removed Chip Erase Errata
M – May 2010
Changed tSE (Typ) 1.6 to 0.7 and (Max) 5 to 1.3
Changed tCE (Typ) TBD to 7 and (Max) TBD to 22
Changed from 10,000 to 20,000 cumulative page erase/program
operations and added the contact statement in section 11.3.
N – November 2012
Update to Adesto.
O - January 2013
change to 2 buffers in diagram 22-1



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