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WM8953ECS/RV 데이터시트(PDF) 56 Page - Wolfson Microelectronics plc

부품명 WM8953ECS/RV
상세설명  Low Power Stereo ADC with PLL and TDM Interface
PDF  100 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8953ECS/RV 데이터시트(HTML) 56 Page - Wolfson Microelectronics plc

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WM8953
Production Data
w
PD, January 2009, Rev 4.0
56
DIGITAL AUDIO INTERFACE
The digital audio interface is used for outputting ADC data from the WM8953. It uses three pins:
•
ADCDAT: ADC data output
•
ADCLRC: ADC data alignment clock
•
BCLK: Bit clock, for synchronisation
The clock signals BCLK and ADCLRC can be outputs when the WM8953 operates as a master, or
inputs when it is a slave (see Master and Slave Mode Operation, below).
Four different audio data formats are supported:
•
Left justified
•
Right justified
•
I2S
•
DSP mode
All four of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the
“Electrical Characteristics” section for timing information.
Time Division Multiplexing (TDM) is available in all four data format modes. The WM8953 can be
programmed to send and receive data in one of two time slots.
PCM operation is supported using the DSP mode.
MASTER AND SLAVE MODE OPERATION
The WM8953 digital audio interface can operate as a master or slave as shown in Figure 29 and
Figure 30.
Figure 29 Master Mode
Figure 30 Slave Mode
The dual Audio Interface approach of the WM8953 has been implemented in such a way that it gives
the user and application as much flexibility as possible. The application needs to be carefully
analysed and the WM8953 configured accordingly. The Audio Interface Output Control is illustrated
in Figure 31.



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