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WM8953ECS/RV 데이터시트(PDF) 59 Page - Wolfson Microelectronics plc

부품명 WM8953ECS/RV
상세설명  Low Power Stereo ADC with PLL and TDM Interface
PDF  100 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8953ECS/RV 데이터시트(HTML) 59 Page - Wolfson Microelectronics plc

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Production Data
WM8953
w
PD, January 2009, Rev 4.0
59
AUDIO DATA FORMATS (NORMAL MODE)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before a ADCLRC
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each ADCLRC transition.
Figure 35 Right Justified Audio Interface (assuming n-bit word length)
In Left Justified mode, the MSB is available on the first rising edge of BCLK following a ADCLRC
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each ADCLRC
transition.
Figure 36 Left Justified Audio Interface (assuming n-bit word length)
In I2S mode, the MSB is available on the second rising edge of BCLK following a ADCLRC transition.
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 37 I2S Justified Audio Interface (assuming n-bit word length)



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