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PIC16LC712 데이터시트(PDF) 76 Page - Microchip Technology

부품명 PIC16LC712
상세설명  8-Bit CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM
PDF  106 Pages
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제조업체  MICROCHIP [Microchip Technology]
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PIC16C712/716
DS41106C-page 76
 1999-2013 Microchip Technology Inc.
12.2
DC Characteristics: PIC16LC712/716-04 (Commercial, Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
0°C
 TA
+70°C
for commercial
-40°C
 TA
+85°C
for industrial
Param
No.
Sym.
Characteristic
Min.
Typ†
Max.
Units
Conditions
D001
VDD
Supply Voltage
2.5
VBOR*
—
—
5.5
5.5
V
V
BOR enabled (Note 7)
D002*
VDR
RAM Data Retention Voltage(1)
—1.5
—
V
D003
VPOR
VDD Start Voltage to ensure inter-
nal Power-on Reset signal
—
VSS
—
V
See section on Power-on Reset for details
D004*
D004A*
SVDD
VDD Rise Rate to ensure internal
Power-on Reset signal
0.05
TBD
—
—
—
—
V/ms
PWRT enabled (PWRTE bit clear)
PWRT disabled (PWRTE bit set)
See section on Power-on Reset for details
D005
VBOR
Brown-out Reset
voltage trip point
3.65
—
4.35
V
BODEN bit set
D010
D010A
IDD
Supply Current(2,5)
—
—
2.0
22.5
3.8
48
mA
A
XT, RC osc modes
FOSC = 4 MHz, VDD = 3.0V (Note 4)
LP osc mode
FOSC = 32 kHz, VDD = 3.0V, WDT disabled
D020
D021
D021A
IPD
Power-down Current(3,5)
—
—
—
7.5
0.9
0.9
30
5
5
A
A
A
VDD = 3.0V, WDT enabled, -40
C to +85C
VDD = 3.0V, WDT disabled, 0
C to +70C
VDD = 3.0V, WDT disabled, -40
C to +85C
D022*
D022A*
IWDT
IBOR
Module Differential Current(6)
Watchdog Timer
Brown-out Reset
—
—
6.0
TBD
20
200
A
A
WDTE bit set, VDD = 4.0V
BODEN bit set, VDD = 5.0V
1A
FOSC
LP Oscillator Operating Frequency
RC Oscillator Operating Frequency
XT Oscillator Operating Frequency
HS Oscillator Operating Frequency
0
0
0
0
—
—
—
—
200
4
4
20
KHz
MHz
MHz
MHz
All temperatures
All temperatures
All temperatures
All temperatures
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note1:
This is the limit to which VDD can be lowered without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current
consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
3:
The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the
part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS.
4:
For RC Osc mode, current through REXT is not included. The current through the resistor can be estimated by the formula
Ir = VDD/2REXT (mA) with REXT in kOhm.
5:
Timer1 oscillator (when enabled) adds approximately 20
A to the specification. This value is from characterization and is
for design guidance only. This is not tested.
6:
The
 current is the additional current consumed when this peripheral is enabled. This current should be added to the base
IDD or IPD measurement.
7:
This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will operate correctly to
this trip point.



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