PIC16F883-ESLASHSO. datasheet(118/338 Pages) MICROCHIP

118 / 338 page

PIC16F882/883/884/886/887

DS41291G-page 118

 2006-2012 Microchip Technology Inc.

10.1.2

READING THE DATA EEPROM

MEMORY

To read a data memory location, the user must write

the address to the EEADR register, clear the EEPGD

control bit of the EECON1 register, and then set control

bit RD. The data is available at the very next cycle, in

the EEDAT register; therefore, it can be read in the next

instruction. EEDAT will hold this value until another

read or until it is written to by the user (during a write

operation).

EXAMPLE 10-1:

DATA EEPROM READ

10.1.3

WRITING TO THE DATA EEPROM

MEMORY

To write an EEPROM data location, the user must first

write the address to the EEADR register and the data

to the EEDAT register. Then the user must follow a

specific sequence to initiate the write for each byte.

The write will not initiate if the above sequence is not

followed exactly (write 55h to EECON2, write AAh to

EECON2, then set WR bit) for each byte. Interrupts

should be disabled during this code segment.

Additionally, the WREN bit in EECON1 must be set to

enable write. This mechanism prevents accidental

writes to data EEPROM due to errant (unexpected)

code execution (i.e., lost programs). The user should

keep the WREN bit clear at all times, except when

updating EEPROM. The WREN bit is not cleared

by hardware.

After a write sequence has been initiated, clearing the

WREN bit will not affect this write cycle. The WR bit will

be inhibited from being set unless the WREN bit is set.

At the completion of the write cycle, the WR bit is

cleared in hardware and the EE Write Complete

Interrupt Flag bit (EEIF) is set. The user can either

enable this interrupt or poll this bit. EEIF must be

cleared by software.

EXAMPLE 10-2:

DATA EEPROM WRITE

BANKSEL EEADR

;

MOVLW

DATA_EE_ADDR

;

MOVWF

EEADR

;Data Memory

;Address to read

BANKSEL EECON1

;

BCF

EECON1, EEPGD ;Point to DATA memory

BSF

EECON1, RD

;EE Read

BANKSEL EEDAT

;

MOVF

EEDAT, W

;W = EEDAT

BCF

STATUS, RP1

;Bank 0

BANKSEL EEADR

;

MOVLW

DATA_EE_ADDR

;

MOVWF

EEADR

;Data Memory Address to write

MOVLW

DATA_EE_DATA

;

MOVWF

EEDAT

;Data Memory Value to write

BANKSEL EECON1

;

BCF

EECON1, EEPGD

;Point to DATA memory

BSF

EECON1, WREN

;Enable writes

BCF

INTCON, GIE

;Disable INTs.

BTFSC

INTCON, GIE

;SEE AN576

GOTO

$-2

MOVLW

55h

;

MOVWF

EECON2

;Write 55h

MOVLW

AAh

;

MOVWF

EECON2

;Write AAh

BSF

EECON1, WR

;Set WR bit to begin write

BSF

INTCON, GIE

;Enable INTs.

SLEEP

;Wait for interrupt to signal write complete

BCF

EECON1, WREN

;Disable writes

BCF

STATUS, RP0

;Bank 0

BCF

STATUS, RP1

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