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PIC16F883-E/SO. 데이터시트(PDF) 156 Page - Microchip Technology |
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PIC16F883-E/SO. 데이터시트(HTML) 156 Page - Microchip Technology |
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156 / 338 page ![]() PIC16F882/883/884/886/887 DS41291G-page 156 2006-2012 Microchip Technology Inc. FIGURE 12-2: EUSART RECEIVE BLOCK DIAGRAM The operation of the EUSART module is controlled through three registers: • Transmit Status and Control (TXSTA) • Receive Status and Control (RCSTA) • Baud Rate Control (BAUDCTL) These registers are detailed in Register 12-1, Register 12-2 and Register 12-3, respectively. RX/DT pin Pin Buffer and Control SPEN Data Recovery CREN OERR FERR RSR Register MSb LSb RX9D RCREG Register FIFO Interrupt RCIF RCIE Data Bus 8 Stop START (8) 7 10 RX9 • • • SPBRG SPBRGH BRG16 RCIDL FOSC ÷ n n + 1 Multiplier x4 x16 x64 SYNC 1X00 0 BRGH X110 0 BRG16 X101 0 Baud Rate Generator |
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