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STM32F051K6 데이터시트(PDF) 75 Page - STMicroelectronics |
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STM32F051K6 데이터시트(HTML) 75 Page - STMicroelectronics |
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75 / 104 page ![]() Electrical characteristics STM32F051x 76/105 Doc ID 022265 Rev 3 6.3.14 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 50). Unless otherwise specified, the parameters given in Table 53 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. Figure 21. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 53. Otherwise the reset will not be taken into account by the device. Table 53. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST) (1) 1. Guaranteed by design, not tested in production. NRST Input low level voltage –0.3 - 0.8 V VIH(NRST) (1) NRST Input high level voltage 2 - VDD+0.3 Vhys(NRST) NRST Schmitt trigger voltage hysteresis - 200 - mV RPU Weak pull-up equivalent resistor(2) 2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance must be minimum (~10% order) . VIN = VSS 30 40 50 k Ω VF(NRST) (1) NRST Input filtered pulse - - 100 ns VNF(NRST) (1) NRST Input not filtered pulse 300 - - ns |
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