M68ICS08GR datasheet(336/408 Pages) FREESCALE

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Timer Interface Module (TIM)

Technical Data

MC68HC908GR8 — Rev 4.0

336

Timer Interface Module (TIM)

MOTOROLA

22.3 Features

Features of the TIM include:

•

Three input capture/output compare channels:

–

Rising-edge, falling-edge, or any-edge input capture trigger

–

Set, clear, or toggle output compare action

•

Buffered and unbuffered pulse-width-modulation (PWM) signal

generation

•

Programmable TIM clock input with 7-frequency internal bus clock

prescaler selection

•

Free-running or modulo up-count operation

•

Toggle any channel pin on overflow

•

TIM counter stop and reset bits

•

I/O port bit(s) software configurable with pullup device(s) if

configured as input port bit(s)

22.4 Pin Name Conventions

The text that follows describes both timers, TIM1 and TIM2. The TIM

input/output (I/O) pin names are T[1,2]CH0 (timer 1 channel 0, timer 2

channel 0) and T[1]CH1 (timer channel 1), where “1” is used to indicate

TIM1 and “2” is used to indicate TIM2. The two TIMs share three I/O pins

with three port D I/O port pins. The full names of the TIM I/O pins are

listed in Table 22-1. The generic pin names appear in the text that

follows.

Table 22-1. Pin Name Conventions

TIM Generic Pin Names:

T[1,2]CH0

T[1,2]CH1

Full TIM

Pin Names:

TIM1

PTD4/ATD12/TBLCK

PTD5/T1CH1

TIM2

PTD6/ATD14/TACLK

Freescale Semiconductor, Inc.

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